INTRODUCTION TO COMPILER DESIGN
TYPES OF COMPILERS
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Running the fetch-decode-execute cycle more efficiently
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Waiting for a full fetch-decode-execute cycle to complete before starting the next
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Fetches the next instruction while the previous instruction is still decoding
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CISC processors can run more efficiently
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RISC processors can run more efficiently
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Detailed explanation-1: -What is pipe-lining? Theory says that : “With pipelining, the CPU begins executing a second instruction before the first instruction is completed. Pipelining results in faster processing because the CPU does not have to wait for one instruction to complete the machine cycle."
Detailed explanation-2: -The biggest advantage of pipelining is that it reduces the processor’s cycle time. This is because it can process more instructions simultaneously, while reducing the delay between completed instructions.
Detailed explanation-3: -The argument for RISC over CISC is that having a less complicated set of instructions makes designing a CPU easier, cheaper and quicker. The primary difference between RISC and CISC architecture is that RISC-based machines execute one instruction per clock cycle.