COMPUTER SCIENCE AND ENGINEERING
COMPUTER ARCHITECTURE
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Control unit
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Registers
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Arithmetic unit
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Logic unit
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Detailed explanation-1: -Memory Buffer Register (MBR)-a two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory.
Detailed explanation-2: -The CPU is designed to understand a set of instructions-the instruction set. It fetches the instructions from the main memory and executes them.
Detailed explanation-3: -The instruction/data held in the MBR/MDR is copied into the CIR . The instruction/data held in the CIR is decoded and then executed. Results of processing are stored in the ACC . The cycle then returns to step one.
Detailed explanation-4: -Fetch stage: The next instruction is fetched from the memory address that is currently stored in the program counter and stored into the instruction register. At the end of the fetch operation, the PC points to the next instruction that will be read at the next cycle.
Detailed explanation-5: -As the data fetched during the fetch stage is an instruction, it is copied into the instruction register (IR).