MCQ IN COMPUTER SCIENCE & ENGINEERING

COMPUTER SCIENCE AND ENGINEERING

COMPUTER ARCHITECTURE

Question [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
Which Register would be first to be accessed during the Fetch-Decode-Execute cycle?
A
PC
B
MAR
C
MDR
D
CIR
Explanation: 

Detailed explanation-1: -As the data fetched during the fetch stage is an instruction, it is copied into the instruction register (IR). As the first instruction has been fetched, the system is at the end of the fetch stage of the cycle.

Detailed explanation-2: -First, the computer needs to load in the value of the variable length into the immediate access store (registers). Next it needs to load in the value of the variable width. Then it needs to multiply the two numbers together, and finally it needs to store the result in the variable area.

Detailed explanation-3: -The CPU works by following a process known as ‘fetch, decode and execute’. The CPU fetches an instruction from memory, decodes this instruction and then executes it. The CPU carries out this cycle continuously, millions of times per second.

Detailed explanation-4: -Registers/circuits involved Memory Buffer Register (MBR)-a two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory. Current Instruction register (CIR)-a temporary holding ground for the instruction that has just been fetched from memory.

Detailed explanation-5: -Answers. -instruction for fetch cycle: So, PC, IR and address register are used.

There is 1 question to complete.