COMPUTER SCIENCE AND ENGINEERING
COMPUTER ORGANIZATION
Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Determine sign and magnitude
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Reduce propagation delay
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Add a 1 to complemented inputs
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Increase ripple delay
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Detailed explanation-1: -A fast Carry Look Ahead Adder is more fast than a normal CLA. Since, it is easy to implement and can be implemented on any types of chip and have the capability to reduce propagation delay, which helps in increasing the speed of 7483 4-bit full-adder.
Detailed explanation-2: -4-Bit Carry Look-ahead Adder In parallel adders, carry output of each full adder is given as a carry input to the next higher-order state. Hence, these adders it is not possible to produce carry and sum outputs of any state unless a carry input is available for that state.
Detailed explanation-3: -The carry propagation delay of each full adder is 12 ns and the sum propagation delay of each full adder is 15 ns.
Detailed explanation-4: -A carry-Lookahead adder is a fast parallel adder as it reduces the propagation delay by more complex hardware, hence it is costlier. In this design, the carry logic over fixed groups of bits of the adder is reduced to two-level logic, which is nothing but a transformation of the ripple carry design.
Detailed explanation-5: -A carry-look ahead adder improves speed by reducing the amount of time required to determine carry bits. It carry look ahead adder calculates one or more carries before the sum, which reduces the wait time to calculate the result of the larger value bits of the adder.