MCQ IN COMPUTER SCIENCE & ENGINEERING

Detailed explanation-1: -As shown in Figure 5.1, the half adder has two inputs, A and B, and two outputs, S and Cout. S is the sum of A and B. If A and B are both 1, S is 2, which cannot be represented with a single binary digit.

Detailed explanation-2: -The half adder circuit has two inputs: A and B, which add two input digits and generates a carry and a sum.

Detailed explanation-3: -Explanation: Total number of inputs in a half adder is two. Since an EXOR gates has 2 inputs and carry is connected with the input of EXOR gates. The output of half-adder is also 2, them being, SUM and CARRY.

Detailed explanation-4: -The half adder determines the least significant bit of the sum as the XOR of the least significant bits of the inputs. The carry output of the half adder becomes the carry input of the full adder. The full adder computes the sum of the inputs A1 and A2 and the carry bit. Example: A=3 (11) and B=1 (01): S0=0.

Detailed explanation-5: -A logic circuit that can perform addition of 2-bits is the HALF ADDER. It is used to add 2-bits using using one EXOR gate where as carry operation can be performed using AND gate. Analysis: Let the two inputs are A and B .