COMPUTER SCIENCE AND ENGINEERING
DIGITAL LOGIC
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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SOP
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POS
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K-map
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None of these
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Detailed explanation-1: -Detailed Solution. (AND-OR) Realization is same as (NAND-NAND) Realization and it is explained in the diagram given below. MPSC AE List of Qualified Candidates for Civil Engineering released on 3rd February 2023! The list for Electrical was announced on 20th January 2023.
Detailed explanation-2: -The NAND-NAND realization is equivalent to AND-OR realization. Bubbled inputs of OR gate will results a NAND gate and compliment of AND gate is a NAND gate. Therefore, NAND-NAND realization is equivalent to AND-OR realization and vice versa.
Detailed explanation-3: -Therefore, the output of this OR-OR logic realization is A+B+C+D. This Boolean function can be implemented by using a 4 input OR gate. Hence, it is degenerative form.
Detailed explanation-4: -Any number of inputs are possible in OR and AND gates. The AND gate is thus named because it behaves just like the logical “AND” operator. When both inputs are “true, ” the result is “true.” Otherwise, “false” is the output. In other words, only when both inputs, one AND two, are 1 is the output 1.
Detailed explanation-5: -A NOR gate is equivalent to an inverted-input AND gate. An OR gate is equivalent to an inverted-input NAND gate.