COMPUTER SCIENCE AND ENGINEERING
DIGITAL LOGIC
Question
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SOP


POS


Kmap


None of these

Detailed explanation1: Detailed Solution. (ANDOR) Realization is same as (NANDNAND) Realization and it is explained in the diagram given below. MPSC AE List of Qualified Candidates for Civil Engineering released on 3rd February 2023! The list for Electrical was announced on 20th January 2023.
Detailed explanation2: The NANDNAND realization is equivalent to ANDOR realization. Bubbled inputs of OR gate will results a NAND gate and compliment of AND gate is a NAND gate. Therefore, NANDNAND realization is equivalent to ANDOR realization and vice versa.
Detailed explanation3: Therefore, the output of this OROR logic realization is A+B+C+D. This Boolean function can be implemented by using a 4 input OR gate. Hence, it is degenerative form.
Detailed explanation4: Any number of inputs are possible in OR and AND gates. The AND gate is thus named because it behaves just like the logical “AND” operator. When both inputs are “true, ” the result is “true.” Otherwise, “false” is the output. In other words, only when both inputs, one AND two, are 1 is the output 1.
Detailed explanation5: A NOR gate is equivalent to an invertedinput AND gate. An OR gate is equivalent to an invertedinput NAND gate.