COMPUTER SCIENCE AND ENGINEERING
DIGITAL LOGIC
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Difficult to design
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More complex operation
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Expensive to fabricate
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None of the above
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Detailed explanation-1: -Unfortunately one of the main disadvantages with asynchronous counters is that there is a small delay between the arrival of the clock pulse at its input and it being present at its output due to the internal circuitry of the gate.
Detailed explanation-2: -In a synchronous sequential circuit, the changes in all the state variables are synchronized with the universal clock signal. In contrast, in an asynchronous sequential circuit, the changes in all the state variables are not synchronized and they may change at any time.
Detailed explanation-3: -In an asynchronous design, because there is no overall clock frequency, the performance impacts of slower components are felt locally rather than globally. Moreover, asynchronous circuit designers can optimize for the average case rather than the worst case execution for any given component.