MCQ IN COMPUTER SCIENCE & ENGINEERING

Detailed explanation-1: -The ARM cortex-M3 consists of 37 register sets wherein 31 are general purpose registers and 6 are status registers. The ARM uses seven processing modes to run the user task. USER Mode: The user mode is a normal mode, which has the least number of registers. It doesn’t have SPSR and has limited access to the CPSR.

Detailed explanation-2: -ARM processors have 37 registers. The registers are arranged in partially overlapping banks. There is a different register bank for each processor mode. The banked registers give rapid context switching for dealing with processor exceptions and privileged operations.

Detailed explanation-3: -The processor has the following 32-bit registers: 13 general-purpose registers, r0-r12. Stack Pointer (SP) alias of banked registers, SP process and SP main.

Detailed explanation-4: -ARM7TDMI has 37 registers (31 GPR and 6 SPR). All these designs use a Von Neumann architecture, thus the few versions containing a cache do not separate data and instruction caches.

Detailed explanation-5: -∎ ARM has 37 registers all of which are 32-bits long.