COMPUTER SCIENCE AND ENGINEERING
DIGITAL LOGIC
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Clock is 0
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Clock is 1
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Does not depend on clock
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None of the above
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Detailed explanation-1: -For this reason, having both S and R equal to 1 is called an invalid or illegal state for the S-R multivibrator. Otherwise, making S=1 and R=0 “sets” the multivibrator so that Q=1 and not-Q=0. Conversely, making R=1 and S=0 “resets” the multivibrator in the opposite state.
Detailed explanation-2: -The circuit diagram of SR Latch is shown in the following figure. This circuit has two inputs S & R and two outputs Qt & Qt’.
Detailed explanation-3: -So we will use this truth table to understand the SR latch as when one of the input is 1 the output of the NOR gate will be 0. So when S = 0 and R =1 the output Q will be 0 because the input of NOR gate G1 is 1.
Detailed explanation-4: -S=1, R=1 is state forbidden in SR flip flop. The flip flop does not get damaged in forbidden state (S=R=1). It is called forbidden because there is no definitive gurantee of a fixed output.