8085 MICROPROCESSOR
FEATURE OF 8085
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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TRAP, RST7.5, RST.6.5, RST5.6, INTA
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TRAP, RST 9.5, RST.6.5, RST5.6, INTR
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TRAP, RST7.5, RST.6.6, RST5.6, INTR
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TRAP, RST7.5, RST.6.5, RST5.5, INTR
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Detailed explanation-1: -TRAP : It is a non-maskable, edge and level-triggered interrupt. It is unaffected by any mask or interrupt enable. RST 7.5 : It is a maskable, edge-triggered interrupt request input line. RST 6.5 and RST 5.5 : These are level-triggered, maskable interrupt request input lines. INTR :
Detailed explanation-2: -RST 5.5. It is a maskable interrupt. When this interrupt is executed, the processor saves the content of the PC register into the stack and branches to 002CH address.
Detailed explanation-3: -RST 6.5 is the TRAP interrupt in the context 8085 microprocessor, it describes as none maskable interrupt. Interrupt is a mechanism by which input/output or an instruction can temporarily suspended the normal execution of processor and jump to a subrountine program.
Detailed explanation-4: -The RST 7.5 interrupt is edge sensitive (positive edge). To initiate the RST 7.5, the interrupt signal has to make a low to high transition an it need not remain high until it is recognized. The RST 6.5, RST 5.5 and INTR are level sensitive interrupts.
Detailed explanation-5: -Ans:-RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7. 14. Which interrupt has the highest priority? Ans:-TRAP has the highest priority.