MICROPROCESSOR AND MICROCONTROLLER

MEMORY ORGANIZATION IN 8051

ARCHITECTURE OF 8085

Question [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
Register banks of 8051 are
A
Bit addressable
B
Byte addressable
C
Reserved
D
None of these
Explanation: 

Detailed explanation-1: -Of the 128-byte internal RAM of the 8051, only 16 bytes are bit-addressable. The rest must be accessed in byte format. The bit-addressable RAM locations are 20H to 2FH. These 16 bytes provide 128 bits of RAM bit-addressability since 16×8= 128.

Detailed explanation-2: -Register Banks in 8051 These 32 bytes are divided into four register banks in which each bank has 8 registers, R0–R7. RAM locations from 0 to 7 are set aside for bank 0 of R0–R7 where R0 is RAM location 0, R1 is RAM location 1, R2 is location 2, and so on, until the memory location 7, which belongs to R7 of bank 0.

Detailed explanation-3: -Bit-addressable objects are objects that may be addressed as words or as bits. Only data objects that occupy the bit-addressable area of the 8051 internal memory fall into this category. The Cx51 Compiler places variables declared with the bdata memory type into the bit-addressable area.

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