MICROPROCESSOR AND MICROCONTROLLER

Detailed explanation-1: -Almost all ARM instructions can include an optional condition code. This is shown in syntax descriptions as cond . An instruction with a condition code is only executed if the condition code flags in the CPSR meet the specified condition.

Detailed explanation-2: -The ARM processors don’t support Byte addressability. Explanation: The ability to store data in the form of consecutive bytes. Explanation: None.

Detailed explanation-3: -They are move, arithmetic, logical, comparison and multiply instructions and multiply instructions.

Detailed explanation-4: -All instructions are 32 bits in length. All instructions must be word aligned. Therefore the PC value is stored in bits [31:2] with bits [1:0] equal to zero (as instruction cannot be halfword or byte aligned).

Detailed explanation-5: -Branch instructions. Data processing instructions. Single register load and store instructions. Multiple register load and store instructions. Status register access instructions. Semaphore instructions. Coprocessor instructions.