MICROPROCESSOR AND MICROCONTROLLER

DMA CONTROLLER

ARCHITECTURE OF 8085

Question [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
Each channel of DMA Controller can perform
A
read transfer
B
Write transfer
C
verify transfer
D
All of the above
Explanation: 

Detailed explanation-1: -Each channel can perform read transfer, write transfer and verify transfer operations. It generates MARK signal to the peripheral device that 128 bytes have been transferred. It requires a single phase clock.

Detailed explanation-2: -The DMA controller transfers data from one address to another, without CPU intervention, across the entire address range. For example, the DMA controller can move data from the ADC conversion memory to RAM. Devices that contain a DMA controller may have up to eight DMA channels available.

Detailed explanation-3: -Each channel can be independently programmable to transfer up to 64kb of data by DMA. Each channel can be independently perform read transfer, write transfer and verify transfer. In maximum mode of the microprocessor RQ/GT pin is used as bus request input.

Detailed explanation-4: -Can a single DMA controller perform operations on two different disks simulteneously? Explanation: The DMA controller can perform operations on two different disks if the appropriate details are known. Explanation: The controller takes over the processor’s access cycles and performs memory operations.

Detailed explanation-5: -A DMA controller can generate memory addresses and initiate memory read or write cycles. It contains several hardware registers that can be written and read by the CPU. These include a memory address register, a byte count register, and one or more control registers.

There is 1 question to complete.