DMA CONTROLLER
ARCHITECTURE OF 8085
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Auto load Mode
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Rotating Priority mode
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Fixed Priority mode
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TC stop bit
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Detailed explanation-1: -If the TC stop bit is set, a channel is disabled (i.e. its enable bit is reset) after the terminal count (TC) output goes high, thus automatically preventing further DMA operation on that channel.
Detailed explanation-2: -Explanation: The RESET pin which is asynchronous input disables all the DMA channels by clearing the mode registers, and tristate all the control lines.
Detailed explanation-3: -TC. It stands for ‘Terminal Count’, which indicates the present DMA cycle to the present peripheral devices.
Detailed explanation-4: -Terminal Count Registers Each of the four DMA channels of 8257 has one terminal count register (TC). This 16-bit register is used for ascertaining that the data transfer through a DMA channel ceases or stops after the required number of DMA cycles.
Detailed explanation-5: -Clarification: The pin ADSTB strobes the higher byte of the memory address, generated by the DMA controller into the latches.