INTERRUPT PROGRAMMING
ARCHITECTURE OF 8085
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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A An interrupt which can never be turned off.
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B An interrupt that can be turned off by the programmer.
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C An interuppt is always on
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D None of these
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Detailed explanation-1: -Maskable interrupts are those that may be accepted or ignored by the CPU based on their priority. In contrast, the CPU must accept the non-maskable interrupts. A hardware interrupt that could be ignored by setting a bit in the interrupt mask register’s (IMR) bit-mask is referred to as a maskable interrupt.
Detailed explanation-2: -RST 7.5, RST 5.5 are maskable interrupts but TRAP is a non-maskable interrupt. Interrupts. Type. Vector.
Detailed explanation-3: -Maskable and Non-Maskable Interrupts – These interrupts are either edge-triggered or level-triggered, so they can be disabled. INTR, RST 7.5, RST 6.5, RST 5.5 are maskable interrupts in 8085 microprocessor. Non-Maskable Interrupts are those which cannot be disabled or ignored by microprocessor.