MICROPROCESSOR AND MICROCONTROLLER

Detailed explanation-1: -8051 architecture handles 5 interrupt sources, out of which two are internal (Timer interrupts), two are external and one is a serial interrupt. Each of their interrupts has its vector address. The highest interrupt priority upon reset in 8051 is external interrupt 0. Hence option (4) is the correct answer.

Detailed explanation-2: -8051 architecture handles 5 interrupt sources, out of which two are internal (Timer Interrupts), two are external and one is a serial interrupt.

Detailed explanation-3: -8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI. Each interrupt can be enabled or disabled by setting bits of the IE register and the whole interrupt system can be disabled by clearing the EA bit of the same register.

Detailed explanation-4: -Timer 0 overflow interrupt-TF0. External hardware interrupt-INT0. Timer 1 overflow interrupt-TF1. External hardware interrupt-INT1. Serial communication interrupt-RI/TI.