INTRODUCTION TO MICROPEOCESSOR
MODEL OF MICROPROCESSOR
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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PT1
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PT0
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PX1
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all of the mentioned
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Detailed explanation-1: -Explanation: The bits, PT1, PT0, PX0 and PX1 when set, work at level 1, otherwise at level 0. Explanation: All the interrupts at level 1 are polled or sensed in the second clock cycle of the fifth T state or 9th clock cycle out of 12 clock cycles. Then all the interrupts at level 0 are also polled in the same cycle.
Detailed explanation-2: -Explanation: Different addresses are assigned for Timer0 and Timer1 overflow flags in the interrupt vector table. They are 0016h and 0012h for timer0 and timer1 respectively.
Detailed explanation-3: -EX0 and EX1 are used to enable the external interrupts 0 and 1. ES is used for serial interrupt. EA bit acts as a lock bit. If any of the interrupt bits are enabled but EA bit is not set, the interrupt will not function.