MEMORY ORGANIZATION IN 8051
ARCHITECTURE OF 8085
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Scratch pad area consists of
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20 Bytes
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80 Bytes
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16 Bytes
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32 Bytes
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Explanation:
Detailed explanation-1: -When all of the register banks are being used, the scratch pad area will be 20H to 7FH. But from 20H to 2FH (16 bytes or 128 bits) can be used as bit addressable RAM. By using some simple instructions with 8-bit memory address we can check the bit addressing.
Detailed explanation-2: -The TI-99/4A console contains 256 bytes of RAM that appear at address >8000-80FF. As the address is not fully decoded, the same memory appears at >8100-81FF, at >8200-82FF, and at >8300-83FF.
Detailed explanation-3: -The registers, PSW, TCON and Accumulator are 8-bit registers.
There is 1 question to complete.