MICROPROCESSOR 8255
ARCHITECTURE OF 8085
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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If A1=0, A0=1 then the input read cycle is performed from
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port A to data bus
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port B to data bus
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port C to data bus
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CWR to data bus
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Explanation:
Detailed explanation-1: -Explanation: If A1=0, A0=1 then the input read cycle is performed from port B to data bus. Explanation: The data bus is tristated when chip select pin=1 or chip select pin=0 and read and write signals are high i.e 1.
Detailed explanation-2: -Port C can be used as an 8-bit input/output port or as two 4-bit input/output ports or to produce handshake signals for ports A and B.
Detailed explanation-3: -All of these ports can function independently either as input or as output ports. This can be achieved by programming the bits of an internal register of 8255 called as control word register ( CWR ).
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