INTRODUCTION TO MICROPEOCESSOR
MODEL OF MICROPROCESSOR
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Question
[CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
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Which location specify the storage/loading of vector address during the interrupt generation?
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Stack Pointer
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Program Counter
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Data Pointer
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All of the above
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Explanation:
Detailed explanation-1: -Program Counter-Specify the storage/loading of vector address.
Detailed explanation-2: -Explanation: TCON register is used to make any interrupt level or edge triggered.
Detailed explanation-3: -8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI. Each interrupt can be enabled or disabled by setting bits of the IE register and the whole interrupt system can be disabled by clearing the EA bit of the same register.
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