GENERAL HISTOLOGY

Detailed explanation-1: -The ICode interface is a 32-bit AHB-Lite bus interface. Instruction fetches and vector fetches from Code memory space ( 0x00000000-0x1FFFFFFF ) are performed over this bus. Only the CM3Core instruction fetch bus can access the ICode interface, enabling optimal code fetch performance.

Detailed explanation-2: -The Cortex-M4 processor contains three external Advanced High-performance Bus (AHB)-Lite bus interfaces and one Advanced Peripheral Bus (APB) interface. The processor matches the AMBA 3 specification except for maintaining control information during waited transfers.

Detailed explanation-3: -The processor contains four bus interfaces: The ICode memory interface. Instruction fetches from Code memory space ( 0x0000000-0x1FFFFFFF) are performed over this 32-bit Advanced High-performance Bus (AHB)-Lite bus.

Detailed explanation-4: -System interface Instruction fetches, and data and debug accesses, to address ranges 0x20000000 to 0xDFFFFFFF and 0xE0100000 to 0xFFFFFFFF are performed over this 32-bit AHB-Lite bus.