GENERAL HISTOLOGY

Detailed explanation-1: -ARM processors normally have a 32-bit address bus. A 32-bit ARM processor could address up to 232 memory locations, i.e. the addressable capacity is 232 bytes ( 4 Gigabytes of memory)

Detailed explanation-2: -ARM word length is 32 bits, memory is byte-addressable using 32-bit addresses, and the processor registers are 32 bits long. Three operand lengths are used in moving data between the memory and the processor registers: byte (8 bits), half word (16 bits), and word (32 bits).

Detailed explanation-3: -The ARMv7-M architecture uses a single, flat address space of 232 8-bit bytes. Byte addresses are treated as unsigned numbers, running from 0 to 232-1. This address space is regarded as consisting of 230 32-bit words, each of whose addresses is word-aligned, meaning that the address is divisible by 4.

Detailed explanation-4: -ARM processors have 37 registers. The registers are arranged in partially overlapping banks. There is a different register bank for each processor mode. The banked registers give rapid context switching for dealing with processor exceptions and privileged operations.